Field of the Invention
The present invention relates to an image processing apparatus and an image processing method for classifying a pattern in an image at high speed.
Description of the Related Art
There is proposed a technique for classifying a specific pattern such as a human body and a human face in an image. In particular, pattern classification techniques for built-in systems for portable terminals and in-vehicle apparatuses have been attracting attentions in recent years.
P. Viola and M. Jones, “Rapid Object Detection using a Boosted Cascade of Simple Features”, Proceedings of IEEE Conference on Computer Vision and Pattern Recognition, Vol. 1, pp. 511-518, December 2001 discusses the following algorithm for increasing the pattern detection speed. The technique generates parameters through Boosting learning and sequentially processes weak classifiers connected in cascade, by using a feature image. Based on a classification result of a weak classifier, the technique determines whether to process the next weak classifier. When the technique determines not to process the next weak classifier (abort), processing of the remaining weak classifiers is omitted.
Japanese Patent No. 5100596 discusses a technique for improving the efficiency of classification processing by using a plurality of calculation apparatuses. More specifically, the technique is intended to improve the processing efficiency by adjusting the configuration of the calculation apparatuses based on a pre-identified pass rate and a pre-identified processing time of the classification processing.
Position and orientation measurement for an imaging apparatus based on image information is used for diverse purposes such as positioning between a real space and a virtual object in mixed reality and augmented reality, self-position estimation in a robot or car, and three-dimensional modeling of an object or space.
The above-described technique discussed in U.S. Pat. No. 5,100,596 processes weak classifiers in parallel on a pipeline basis and changes the concurrency level of the calculation apparatuses to improve the processing efficiency. However, if abort processing occurs, the processing efficiency of the calculation apparatuses may decrease.